PCMSK0

Acronym: Pin Change Mask Register 0

Explanation: Determines which pins (from all eight, pins PCINT7 to PCINT0, to none) will cause the PCINT_vect0 interrupt vector to be triggered.

Manual

• Bit 7:0 – PCINT[7:0]: Pin Change Enable Mask 7...0

Each PCINT bit from 7 to 0 selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[7:0] is cleared, pin change interrupt on the corresponding I/O pin is disabled.

Source:

• Atmega328p, revision 8271G–AVR–02/2013
  • Section 13.2.8, page 75
  • Link as of Jan 2014
• See the Atmel website for the most recent revision.

Code Examples

Quickstart Syntax

PCMSK0 = 0x01; /* binary 0b00000001, enables PCINT0 */
PCMSK0 = 0x80; /* binary 0b10000000, enables PCINT7 */
PCMSK1 = 0x01; /* enables PCINT8 */
PCMSK2 = 0x01; /* enables PCINT16 */

Detailed Example

For an in-depth example, please refer to Interrupts Code Examples, PCMSK0.

See also

External Interrupts Registers

• EICRA | EIMSK | EIFR
• PCMSK0 | PCMSK1 | PCMSK2 | PCICR | PCIFR

External Interrupts Pins

• INTx | PCINTx

External Interrupts Vectors

• INT0_vect | INT1_vect | PCINT_vect0 | PCINT_vect1 | PCINT_vect2

Interrupts

• sei() | cli() | ISR() | Interrupts Quickstart | Table of AVR Interrupts
• External Interrupts